1. Technical Field of the Invention
The present invention relates to a process for forming a silicon-based single-crystal portion on the surface of a substrate. In particular, the process may be carried out during the fabrication of an integrated electronic circuit.
2. Description of Related Art
Many integrated electronic circuit architectures require the production, on a substrate, of portions of a substantially single-crystal semiconductor material. Such portions may be used for example to form source and drain zones of MOS transistors that are raised, that is to say they are located above the surface of the substrate, or to produce heterojunction bipolar transistors.
It is known to produce substantially single-crystal portions starting from exposed parts of the substrate, which are themselves made of single-crystal material. The single-crystal parts of the substrate serve as seeds for forming the portions. Such a way of forming the portions is called epitaxial growth. Outside the single-crystal parts of the substrate, the surface of the substrate may consist of insulating material, such as silica (SiO2) or silicon nitride (Si3N4). The material of the portions formed is in general silicon, or a silicon-germanium alloy, which may also include carbon atoms. The deposition process most often used for epitaxial growth is CVD (chemical vapor deposition). The layer is then formed from gaseous precursor compounds that are brought into contact with the surface of the substrate and chemically react thereon. Such a process is generally carried out in a vacuum chamber.
Substantially single-crystal portions are formed, using the compound dichlorosilane (SiH2Cl2) as a gaseous silicon precursor, in the substrate zones where the exposed surface is made of an initially single-crystal material. Simultaneously, amorphous, or possibly polycrystalline, portions are formed in the substrate zones where an insulating material is exposed, or even no portion is formed in the latter zones. In this case, the process for forming the single-crystal portion is called “selective epitaxial growth”. Most often a gas mixture is used that comprises, apart from the dichlorosilane compound, hydrogen (H2) molecules and germanium hydride (GeH4) molecules. The deposition parameters comprise the partial pressures of the gaseous compounds, the temperature of the substrate and the amount of hydrogen chloride (HCl) that is added to the mixture. These parameters may be adjusted so as to obtain a defined degree of deposition selectivity between substrate zones where the surface is made of single-crystal material and substrate zones where the surface is made of insulating material.
However, such a process, which is based on the use of the compound dichlorosilane, has kinetic characteristics that vary very rapidly with the temperature of the substrate. More particularly, satisfactory deposition selectivity is achieved only for high substrate temperatures within a very narrow temperature range and within a narrow hydrogen chloride partial pressure range. As a result, the layers deposited have poor reproducibility characteristics, especially as regards their selectivity with respect to the material of the substrate that is exposed in different zones. Furthermore, the selectivity obtained depends on the dimensions of the various substrate zones. Finally, the single-crystal portions are formed under selective conditions, from a dichlorosilane/hydrogen chloride mixture, with a low growth rate. The deposition process must therefore be continued for a long time in order to obtain layers that have thicknesses compatible with the architecture of the integrated electronic circuit. Consequently, the deposition process limits the fabrication output that can be achieved on an integrated electronic circuit production line.
It is also known to use disilane (Si2H6) and gaseous chlorine (Cl2) to selectively deposit a silicon-based substantially single-crystal material. In particular, the disilane and the chlorine may be brought into contact with the substrate alternately, and the selectivity of the layers deposited results from a latency time, after which deposition takes place in the substrate zones where an amorphous or insulating material is exposed. However, such a process is implemented only under ultra high-vacuum conditions and the alternation between introducing disilane and introducing chlorine requires very lengthy treatment times. Furthermore, this process is sensitive to the temperature of the substrate, which is roughly equivalent to the temperature at which the dichlorosilane is used. Said process therefore does not significantly improve the production yield for integrated electronic circuits, nor does it reduce the requirement to control the temperature of the substrate.
There is a need to provide a process for producing a silicon-based single-crystal portion, which process is selective with respect to the material of the substrate exposed in different zones and does not have the drawbacks indicated above.